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INTEGRATED CIRCUITS
74LVT74 3.3V Dual D-type flip-flop
Product specification IC24 Data Handbook 1996 Aug 28
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
QUICK REFERENCE DATA
SYMBOL PARAMETER Propagation delay CPn to Qn Input capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3.0V VCC = 3.6V TYPICAL UNIT
DESCRIPTION
The 74LVT74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock input. When set and reset are inactive (high), data at the D input is transferred to the Q and Q outputs on the low-to-high transition of the clock. Data must be stable just one setup time prior to the low-to-high transition of the clock for predictable operation. Clock triggering occurs at a voltage level and is not directly related to the transition time of the positive-going pulse. Following the hold time interval, data at the D input may be changed without affecting the levels of the output.
tPLH tPHL CIN ICC
3.1 3.6 3 0.5
ns
pF mA
PIN CONFIGURATION
RD0 D0 CP0 SD0 Q0 Q0 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC RD1 D1 CP1 SD1 Q1 Q1
PIN DESCRIPTION
PIN NUMBER 2, 12 3, 11 4, 10 1, 13 5, 6, 8, 9
SF00045
SYMBOL D0, D1 CP0, CP1 SD0, SD1 RD0, RD1 Qn, Qn
NAME AND FUNCTION Data inputs Clock inputs (active rising edge) Set inputs (active LOW) Reset inputs (active LOW) Data outputs
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
2 12 4 3 D0 D1 3 4 1 11 10 13 CP0 1 SD0 RD0 10 CP1 SD1 RD1 Q0 Q0 Q1 Q1 VCC = Pin 14 GND = Pin 7 11 C2 12 13 2D R 8 S 9 C1 2 1D R 6 S
&
5
5
6
9
8
SA00359
SF00047
ORDERING INFORMATION
PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP 14-Pin Plastic TSSOP TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT74 D 74LVT74 DB 74LVT74 PW NORTH AMERICA 74LVT74 D 74LVT74 DB 74LVT74PW DH DWG NUMBER SOT108-1 SOT337-1 SOT402-1
1996 Aug 28
2
853-1872 17244
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS OUTPUTS D X X X h l X Q H L H H L NC Q L H H L H NC SD L RD H L L H H H CP X X X OPERATING MODE Asynchronous set Asynchronous reset Undetermined* Load "1" Load "0" Hold
SD
4, 10
RD
1, 13
5, 9 Q
H L H
CP
3, 11
6, 8
Q
H H
D
2, 12
VCC = Pin 14 GND = Pin 7
SF00048
NOTES: H = High voltage level h = High voltage level one setup time prior to low-to-high clock transition L = Low voltage level l = Low voltage level one setup time prior to low-to-high clock transition NC= No change from the previous setup X = Don't care = Low-to-high clock transition = Not low-to-high clock transition * = This setup is unstable and will change when either set or reset return to the high level.
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current out ut Storage temperature range VO < 0 Output in Off or High state Output in High state Output in Low state VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 -32 64 -65 to 150 UNIT V mA V mA V mA C
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER LIMITS MIN 2.7 0 2.0 0.8 -20 32 10 +85 MAX 3.6 5.5 UNIT V V V V mA mA ns/V C
1996 Aug 28
3
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL VIK VOH PARAMETER Input clamp voltage High-level output voltage TEST CONDITIONS VCC = 2.7V; IIK = -18mA VCC = 2.7 to 3.6V; IOH = -100A VCC = 2.7V; IOH = -6mA VCC = 3.0V; IOH = -20mA VCC = 2.7V; IOL = 100A VOL Low-level output voltage VCC = 2.7V; IOL = 24mA VCC = 3.0V; IOL = 32mA II IOFF ICC ICC CI In ut Input leakage current Output off current Quiescent supply current Additional supply current per input pin2 Input capacitance VCC = 0 or 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC or GND VCC = 0V; VI or VO = 0 to 4.5V VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND VI = 3V or 0 3 0.5 VCC-0.2 2.4 2.0 0.2 0.5 0.5 10 1 100 1 0.2 A A mA A pF V V Temp = -40C to +85C MIN TYP1 MAX -1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specificed voltage level other than VCC or GND.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL fMAX tPLH tPHL tPLH tPHL PARAMETER Maximum clock frequency Propagation delay CPn to Qn or Qn Propagation delay SDn, RDn to Qn or Qn WAVEFORM MIN 1 1 2 150 1.0 1.0 1.0 1.0 VCC = 3.3V 0.3V TYP1 345 3.1 3.6 3.1 3.0 4.8 5.0 5.0 4.4 5.8 5.0 6.2 4.8 MAX VCC = 2.7V MAX MHz ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C.
AC SETUP REQUIREMENTS
LIMITS SYMBOL tS (H) tS (L) th (H) th (L) tW (H) tW (L) tW (L) trec Setup time Dn to CPn Holdtime Dn to CPn CPn Pulse Width SDn, RDn Pulse Width Recovery time SDn, RDn tp CPn PARAMETER WAVEFORM VCC = 3.3V 0.3V MIN 1 1 1 2 3 1.7 1.4 0.3 0 2.0 2.0 2.0 0.5 TYP 0.6 0.4 -0.3 -0.6 1.0 1.2 1.0 -0.3 VCC = 2.7V MIN 1.8 1.6 0.3 0 3.0 3.0 3.0 0.5 ns ns UNIT
ns
1996 Aug 28
4
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
tw(L) VM
Dn
VM tsu(L)
VM th(L) 1/fmax
VM tsu(H)
VM th(H)
SDn VM
CPn
VM tw(H) tPLH
VM
tw(L)
RDn VM tPLH tPHL Qn VM tPHL
tw(L) VM tPHL VM
Qn
VM tPLH
VM tPHL
VM tPLH Qn VM VM
Qn
VM
VM
SF00050 SF00049
Waveform 1. Propagation delay for data to output, data setup time and hold times, and clock width, and maximum clock frequency
Waveform 2. Propagation delay for set and reset to output, set and reset pulse width
SDn or RDn
VM trec
CPn
VM
SF00051
Waveform 3. Recovery time for set or reset to clock
TEST CIRCUIT AND WAVEFORMS
VCC 90% NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. CL RL POSITIVE PULSE VOUT VM 10% tTHL (tF) tTLH (tR) 90% VM tW 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
Test Circuit for Outputs
10%
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate 10MHz tW tR tF
500ns 2.5ns 2.5ns
SV00022
1996 Aug 28
5
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
1996 Aug 28
6
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
1996 Aug 28
7
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
1996 Aug 28
8
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
NOTES
1996 Aug 28
9
Philips Semiconductors
Product specification
3.3V Dual D-type flip-flop
74LVT74
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. (c) Copyright Philips Electronics North America Corporation 1996 All rights reserved. Printed in U.S.A.

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